### Dr Peter Aaen

### Biography

### Biography

Peter H. Aaen received the B.A.Sc. degree in Engineering Science and the M.A.Sc. degree in Electrical Engineering, both from the University of Toronto, Toronto, ON., Canada, and the Ph.D. degree in Electrical Engineering from Arizona State University, Tempe, AZ., USA, in 1995, 1997 and 2005, respectively. Prior to joining the University of Surrey, he was the manager of the RF Modeling and Measurement Technology team at Freescale Semiconductor Inc, Tempe, AZ, USA; a company which he joined in 1997 (then Motorola Inc. Semiconductor Product Sector).

He is a Senior Member of the IEEE, a member of the Microwave Theory and Techniques and Electron Device Societies, and is an active member of many technical committees including: IEEE Technical Committee (MTT-1) on Computer-Aided Design, technical program committee member (TPC) of the IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), and an executive committee member of the Automatic RF Techniques Group (ARFTG).

### Research interests

His areas of expertise include calibration techniques for microwave measurements, development of package modeling techniques, development of passive and active compact models for the design of microwave power transistors and RFICs, and development of efficient electromagnetic simulation and optimization methodologies for complex packaged environments. His current work focuses on the development and validation of multi-physics based modeling methodologies for high-power and high-frequency electronic devices.

### My publications

### Publications

dispersion in laterally diffused metal-oxide semiconductor (LDMOS)

from pulsed-S-parameter measurement. Using the calculated

high-frequency drain current from measured data, we

demonstrate that length of the lightly doped drain extension is

directly proportional to the amount of current collapse at high

frequency. To capture the frequency dispersion in a nonlinear

model, a frequency-domain mapping technique is proposed to

allow us to augment quasi-static nonlinear electrothermal models.

The importance of including the dispersiveness is demonstrated

through comparing a standard quasi-static model, the newly

augmented model and on-wafer load-pull measurements. For a

5-mm, 500 m unit-gate-width transistor, we demonstrate that

the quasi-static model over predicts the drain efficiency during

large signal drive at P3dB by 9%. The new augmented model is

able to predict the efficiency within 2% of the measured value.

present extreme impedances, which are far removed from the

50-© reference impedance of conventional test equipment,

resulting in a reduction in the measurement sensitivity as

compared with impedances close to the reference impedance. This

letter describes a novel method based on active interferometry

to increase the measurement sensitivity of a VNA for measuring

such extreme impedances, using only a single coupler. The

theory of the method is explained with supporting simulation.

An interferometry-based method is demonstrated for the

first time with on-wafer measurements, resulting in an

improved measurement sensitivity for extreme impedance device

characterization of up to 9%.

characterization of inkjet printed components on flexible substrates,

which aim at measuring the material properties of

silver nanoparticle inks and the supporting dielectric spacer

employed during measurements. Starting with propagation constant

extracted from multiline thru-reflect-line calibration with

coplanar waveguide (CPW) standards and then proceeding with

finite element modeling of CPWs, the proposed technique can

dynamically produce an interpolated search space by automatic

driving of simulation tools. In the final stage, the algorithm

utilizes a least-square optimization routine to minimize the

deviation between model and measurements. Our technique

significantly reduces the computing resources and is able to

extract the material parameters using even a nominal ink profile.

Characteristic impedances for CPWs are extracted using series

resistor measurements from 10 MHz to 20 GHz. It is also

shown that the proposed characterization methodology is able

to detect any changes in material properties induced by changes

in fabrication parameters such as sintering temperature. Ink

conductivities of approximately 2.973×10^7 S/m and spacer

dielectric constant of 1.78 were obtained for the inkjet printed

CPWs on PET. In addition, the inkjet printed CPWs sintered at

170°C and 220°C on Kapton had conductivities of 0.187×10^7 and 0.201×10^7 S/m respectively. We verified our technique by

measuring the material parameters with conventional approach.

modelling of adaptive array systems (AASs) incorporating high-

power amplifier (HPA) nonlinearities. The model is motivated

by the need to better define the spatial and spectral interference

profile of AASs. We provide a simulated proof of concept as a

precursor to experimental validation. In our demonstration, the

model is identified using simulated near-field measurements made

while the antenna?s input channels are simultaneously undergoing

a representative excitation. These measurements are used to

identify a large number of memory polynomials (MPs) which

characterise the transfer function from the antenna inputs to the

near-field. We then use the array of MPs and a near-field to far-

field transformation to obtain the far-field pattern of the antenna

for arbitrary input. We show the impact of antenna element HPA

nonlinearities on the far-field pattern, and our ability to predict

them via the developed model.

Power Microwave Transistors. Invited paper., ARMMS RF & MICROWAVE SOCIETY

Thermoreflectance based temperature measurements have been recently applied to high-power microwave semiconductors. The technique determines the temperature by measuring the change in reflectance from a surface due to changing in the index of refraction of the sample. Since the measurement technique uses visible light, thermoreflectance imaging can achieve a spatial resolution of 290 nm and sub-nanosecond temporal resolution over a wide field of view. This makes the method well suited to study the thermal dynamics within these transistors.

This presentation will review the capabilities of thermoreflectance measurement, explain the theory behind the thermoreflectance phenomenon, and demonstrate the usefulness of the method and the insights that can be gained by examining several recent measurements.

bottom-gated FET switch using indium-arsenide

nanowires. The nanowires have been included on the switch

using dielectrophoresis, which is a solution processable

technique. This is a necessary first step towards developing

a fully printable switch on a flexible substrate, for low cost

microwave devices, built using additive manufacturing methods.

The measured S-parameters show the switching capabilities of

the device with an insertion loss of 9 dB, when the switch is

open (gate voltage e 60 V). The development of a distributed

circuit model that matches the measured data is described,

alongside the calculated network parameters used to represent

the coplanar-waveguide and the nanowires. The model fits the

measured results within 8%, making it suitable for inclusion in

a CAD based circuit simulator.

model to capture the high-frequency dispersion exhibited by

laterally diffused metal-oxide semiconductor (LDMOS) devices.

We show that industry-standard nonlinear large-signal models for

LDMOS based on quasi-static assumptions are not sufficient for

high-efficiency designs at frequencies higher than 2 GHz. This dispersive

behavior results from the combination of high-frequency

operation and the lengthened drain extension region that is needed

to support high-voltage operation. To improve the model accuracy,

higher-order current and charge components, which are directly

integrated from bias-dependent S-parameter data, are included

in the model. The non-quasi-static large-signal model improves

the efficiency and gain predictions by 10% and 0.5 dB at

3.5 GHz. These improvements in accuracy are essential for power

amplifier designers to achieve the performance targets necessary

for 4G and upcoming 5G designs.

Initially, InAs NW FETs were developed and tested in direct ? current mode to allow evaluation and extraction of key transistor performance parameters such charge carrier mobility, threshold, on/off ratio, transconductance, subthreshold swing, and on-channel resistance. The InAs NW were assembled from nanowire ?inks? in the FETs channel via electric -field assisted assembly technique, dielectrophoresis. Nanowires were directly incorporated in FETs with bottom-gate architecture on Si/SiO2 substrates, and with top-gate architecture on quartz substrates with polymeric gate dielectrics. Current-voltage characteristics were measured both in controlled dry nitrogen atmosphere and ambient environment, and demonstrated an instability of unprotected InAs NW in ambient air. Protection of nanowire channel with Al2O3 layers has resulted in significant improvement of device stability. Optimised InAs NW FET devices demonstrated electron mobility over 1000 cm2/Vs and on-off current ratios up to 1000.

Finally, a proof of principle for solution processed InAs NW field-effect transistors operating as microwave switches in 5-33GHz frequency range have been demonstrated. FET devices were implemented in co-planar waveguide (CPW) microwave transmission line geometry, providing efficient transmission or reflection of microwave signal. The FETs demonstrated high performance with transistor ON-state resistance as small as H50 © providing an excellent impedance match to that of microwave waveguide. Bringing FETs to the OFF state provided 1000 times resistance increase, resulting in FET microwave switch behaviour, characterised by ~10 dB change in scattering (S)-parameters, such as difference in transmission coefficient S21 between on/off switching states.

Transistors in Plastic Packages, 91st ARFTG Microwave Measurement Conference Proceedings IEEE

of an LDMOS transistor in an over-molded plastic

package are presented. The measurement system uses a

commercially-available electro-optic system connected to an

NVNA with a comb generator to non-invasively measure the

phase-coherent multi-harmonic E-fields. The device is measured

in a load-pull measurement system, which is used to present

optimal source and load impedances to the transistor during

the multi-harmonic E-field measurements. All three E-field components

are measured at the fundamental (2.2 GHz) and two

harmonics at P1dB = 53.2 dBm.

a novel extension of the X-parameter behavioral modeling

paradigm to include dynamic electro-thermal phenomena, a key

source of long-term memory affecting transistors. The dynamic

thermal X-parameter model (DTXM) adds a novel but straightforward

method to implement envelope domain sub-circuit in a

feedback loop around a conventional static X-parameter model,

enabling the simulation of modulated waveform-dependent

dynamic self-heating effects. The extended model is identified

from conventional CW or pulsed X-parameter measurements,

over a range of ambient temperatures. A re-referencing of the

extracted X-parameter data to the junction temperature is

performed, based on estimated or a calculated thermal resistance

and thermal capacitance. The model can also be generated in the

simulation environment starting from a dynamic electro-thermal

compact time-domain model. The DTXM accounts for thermallyinduced

asymmetry of intermodulation distortion products and

temperature hysteresis depending on the signal bandwidth.

for Distributed E-field Measurements, IEEE Transactions on Microwave Theory and Techniques 66 (6) pp. 2896-2903 IEEE

pulsed nonlinear vector network analyser-based load-pull measurement

system for distributed multi-harmonic electric field

measurements is presented. The system uses an external electrooptic

probe to measure cross-frequency phase-coherent multiharmonic

vector E-fields with an 8 µm spatial resolution and

20 MHz ? 20 GHz bandwidth. We demonstrate the performance

of the distributed phase-coherent E-field measurements of Ex,

Ey and Ez components with 3 harmonics above a commercially

available large periphery, packaged, laterally diffused metaloxide-semiconductor

(LDMOS) transistor. The transistor was

measured at 2.2 GHz under pulsed conditions with 10 µs pulse

and 10 % duty cycle, while outputting 55.1 dBm of power. The

measured electric fields of the operating transistor are animated

for the first time and reveal complex non-uniform operation at

harmonic frequencies

Oscillations within Power Amplifiers, IEEE Transactions on Instrumentation and Measurement IEEE

that is capable of directly detecting and identifying the

physical location of an oscillation within RF and microwave

power amplifiers. The method uses a combined external electrooptic,

non-linear vector network analyzer, and vector load-pull

measurement system, which allows the measurement of crossfrequency

phase-coherent multi-harmonic vector electric fields

above the transistor with an 8 ¼m spatial resolution and 20 MHz ?

40 GHz bandwidth. Raster scans above the amplifier allow the

time-domain electric fields to be animated and superimposed

on top of the amplifier image enabling immediate identification

of any oscillations by direct inspection. The method is first

demonstrated on a low power amplifier composed of two parallel

0.1-W pHEMT transistors that is intentionally designed to have

an odd-mode oscillation. The applicability of the method is

further demonstrated by measuring and animating in-package

parametric odd-mode oscillations within a 260-W laterally diffused

metal-oxide-semiconductor (LDMOS) transistor operating

at 2.2 GHz under pulsed RF conditions with 10 ¼s pulses and

10% duty cycle. The measurement and identification technique

is applicable to all semiconductor devices as the external electric

field is non-invasively measured above the amplifier.

uncertainties into a nonlinear behavioral model of a

millimeter-wave amplifier. We make use of the National Institute

of Standards and Technology Microwave Uncertainty Framework

to evaluate the uncertainties in large-signal electromagnetic wave

measurements of an amplifier, followed by the extraction of Xparameters

using an industry standard algorithm. This extracted

model is included as a component in a circuit simulator to evaluate

gain and efficiency incorporating measurement uncertainty.