Dr Peter Aaen

This paper describes the computer-aided-design (CAD)-assited microwave characterization of coplanar waveguide (CPW) lines formed by ink-jet printed technology on flexible polyethylene terephthalate (PET) substrates. A spacemapping technique is used to link the measured results with simulations and the mapping is used to extract the electrical properties of the ink and supporting dielectric spacer employed during measurements. Results indicate that the losses in lines are predominantly due to the loss tangent of the substrate and the conductivity of the ink. Estimates of the conductivity of the ink and the dielectric constant of the spacer used during measurement were obtained as 2:97 107 S/m, and 1.79 respectively.

A new extrinsic network and extrinsic parameter extraction methodology is developed for high power RF LDMOS transistor modeling. This new method uses accurate manifold deembedding using electromagnetic simulation, and optimization of the extrinsic network parameter values over a broad frequency range. The new extrinsic network accommodates feedback effects which are observed in high power transistors. This improved methodology allows us to achieve a good agreement between measured and modeled S-parameters in the frequency range of 0.5 to 6 GHz for different bias conditions. Large-signal verification of this new model shows a very good match with measurements at 2.14 GHz. © 2008 IEEE.

In this paper, we examine the effects that the thermal interface between materials has on the thermal resistance extracted from electrical measurements. We also examine the consequent degradation in electrical performance. We present the characterization of the transistor under various thermal environments: mounted in packages, using various die attachments, and on-wafer. A wide range of thermal resistances are extracted and we demonstrate the importance of proper characterization during on-wafer thermal measurements. Finite-element simulations show that we can account for various thermal interfaces by changing the coefficient of thermal transfer from the semiconductor device to the material beneath it. Simulations are shown to be in good agreement with measured results. © 2012 IEEE.

In this paper, we present a multiphysics approach for the simulation of high-power RF and microwave transistors, in which electromagnetic, thermal, and nonlinear transistor models are linked together within a harmonic-balance circuit simulator. This approach is used to analyze a laterally diffused metal-oxide-semiconductor (LDMOS) transistor that has a total gate width of 102 mm and operates at 2.14 GHz. The transistor die is placed in a metal-ceramic package, with bond-wire arrays connecting the die to the package leads. The effects of three different gate bond-pad layouts on the transistor efficiency are studied. Through plots of the spatial distributions of the drain efficiency and the time-domain currents and voltages across the die, we reveal for the first time unique interactions between the electromagnetic effects of the layout and the microwave behavior of the large-die LDMOS power field-effect transistor. © 1963-2012 IEEE.

This paper presents a novel Two Hidden Layers Artificial Neural Networks (2HLANN) model for behavioral modeling and linearization of RF Power Amplifiers (PAs). Starting with a feedback loop principle model of a PA, an appropriate neural networks structure is deduced. This structure was then optimized to form a real valued and feed-forward 2HLANN based model capable of predicting the nonlinear behavior and the memory effects of wideband PAs. The validation of the proposed model in mimicking the behavior of a Device Under Test (DUT) is carried out in terms of its accuracy in predicting the output spectrum, dynamic AMI AM and AMIPM characteristics and the normalized mean square error. In addition, the 2HLANN model was used to linearize two 250 Watt peak-envelope-power Doherty PAs (DPAs) driven with 20 MHz bandwidth signals. The linearization of these DPAs using the 2HLANN enabled attaining an output power of up to 46.8 dBm and an average efficiency of up to 47.5% coupled with an Adjacent Channel Power Ratio higher than 50 dBc. When compared to a number of previously published behavioral and DPD schemes, the 2HLANN model demonstrated an excellent modeling accuracy and linearization capability. © 2010 IEEE.

In this paper, a portable space-mapping technique is presented for efficient statistical modeling of passive components. The proposed technique utilizes the cost-effective model composition of a statistical space mapping, while introducing the portable mapping concept for flexible model development for passive modeling. The portable mapping is a single-development-multiple-use versatile wrapper, such that after development it can be conveniently combined with any nominal model to form a set of statistical models of different speed and accuracy. This provides variety in model selection for different design needs. To further reduce modeling cost, i.e., the simulation time required for model data generation, a smart sampling technique is used to achieve better sampling fidelity with smaller sample size. The portable statistical mapping technique is demonstrated through modeling a transmission line and a spiral inductor. © 2006 IEEE.

© 2014 IEEE.This paper demonstrates a new concept of multilayered patterned ground shield (PGS) for improving Q-factor of a Si-based spiral inductor. The impact of left-handed behavior of complementary split ring resonator (CSRR) and split ring resonator (SRR) patterns to realize a high inductance in the ground shield is explained through an equivalent circuit model. The proposed two layer patterned ground shield is shown to improve the Q-value of on-chip spiral inductors by 23.7%.

The coupling between charge transport, heat and energy flow required to model high frequency power devices is developed in the context of a computationally efficient physics-based model, which has been successfully applied to microwave laterally diffused MOS transistors. The accurate prediction of small-and large-signal microwave characteristics, and the physical insight gained, can be used in the process-orientated optimization and process sensitivity analysis of LDMOS power FETs. The charge-based model is well-suited to non-linear CAD implementation for applications such as power amplifier design. © 2012 IEEE.

This paper characterises the effects of frequency dispersion in laterally diffused metal-oxide semiconductor (LDMOS) from pulsed-S-parameter measurement. Using the calculated high-frequency drain current from measured data, we demonstrate that length of the lightly doped drain extension is directly proportional to the amount of current collapse at high frequency. To capture the frequency dispersion in a nonlinear model, a frequency-domain mapping technique is proposed to allow us to augment quasi-static nonlinear electrothermal models. The importance of including the dispersiveness is demonstrated through comparing a standard quasi-static model, the newly augmented model and on-wafer load-pull measurements. For a 5-mm, 500 m unit-gate-width transistor, we demonstrate that the quasi-static model over predicts the drain efficiency during large signal drive at P3dB by 9%. The new augmented model is able to predict the efficiency within 2% of the measured value.

A new nonlinear, charge-conservative, dynamic electro-thermal compact model for LDMOS RF power transistors is described in this paper. The transistor is characterized using pulsed I-V and S-parameter measurements, to ensure isothermal conditions. The intrinsic model current and charge sources are obtained by integration of the real and imaginary components, respectively, of the small-signal Y-parameters: this yields a charge-conservative model by design. A thermal sub-circuit is used to introduce dynamic thermal dependence, and thermal threshold voltage shift is built in. DC and large-signal validation of the model is presented. © 2008 IEEE.

A new type of high resolution E-field microscope system is described. The system is based on a novel design of an active E-field probe (EFP) probe, which is both nonintrusive and displays high spatial resolution. This paper focuses on the construction and spatial resolution of the probe, which shows significant evolution from that previously reported [1], and some measurements on passive structures which indicate that features smaller than 100 microns can be individually resolved. The probe construction lends itself to further improvements in spatial resolution. Measurement results are presented which demonstrate the high resolution of the probe, and its potential utility in measuring waveforms with high spatial resolution at individual points on microwave circuits, discrete devices, and integrated circuits. © 2011 IEEE.

This paper compares two popular high power, high efficiency modes of operation, class F and inverse class F, and assesses the peak obtainable drain efficiencies when using Si LDMOS devices in a limited bandwidth design. Optimum class F and inverse class F conditions are presented using active harmonic load-pull measurements, and it was found that a higher drain efficiency was achieved in the class F configuration. This result is due to the limitations imposed by the soft voltage breakdown occurring due to the extended voltage swings inherent to inverse class F, as a consequence generating unwanted current content during the off cycle. This significantly reduces the peak measured efficiency using Si LDMOS devices when implementing an inverse class F design with a drain bias of 28 V. By reducing the drain bias to 18 V, to accommodate the voltage extension of inverse class F, it became possible to achieve peak measured efficiencies much closer to what theory predicted. © 2006 IEEE.

A new nonlinear charge-conservative scalable dynamic electro-thermal compact model for laterally defused MOS (LDMOS) RF power transistors is described in this paper. The transistor is characterized using pulsed I-V and S-parameter measurements, to ensure isothermal conditions. A new extrinsic network and extrinsic parameter-extraction methodology is developed for high-power RF LDMOS transistor modeling, using manifold deembedding by electromagnetic simulation, and optimization of the extrinsic network parameter values over a broad frequency range. The intrinsic model comprises controlled charge and current sources that have been implemented using artificial neural networks, designed to permit accurate extrapolation of the transistor's performance outside of the measured data domain. A thermal sub-circuit is coupled to the nonlinear model. Large-signal validation of this new model shows a very good agreement with measurements at 2.14 GHz. © 2008 IEEE.

In this paper we show how a thin-plate spline approximation can be used to generate a model of the measured response surface of a load-pull measurement over a much-reduced number of impedance points with no significant loss of accuracy. Further, interpolation between these model surfaces is possible, generating accurate drive-up characteristics. This has enabled accurate load-pull characterizations to be made in a fraction of the usual time.

The affect of the ground step discontinuity created by a difference in package and printed circuit board (PCB) thickness was studied. It is observed that the step in the reference conductor can be represented by a series inductance and its value depends on the height of the step and the width of the transmission line above it. The overall circuit affects for a packaged transistors were simulated with commercially available electromagnetic 2D and 3D CAD tools. The results show that the discontinuity creates an inductive feedback path around the package.

A new quasi-two-dimensional (Q2D) model is described for microwave laterally diffused MOS (LDMOS) power transistors. A set of one-dimensional energy transport equations are solved across a two-dimensional cross-section in a "current-driven" form. This process-oriented nonlinear model accounts for thermal effects, avalanche breakdown and gate conduction. It accurately predicts DC and microwave characteristics as demonstrated by comparison with measured DC characteristics, transconductance, forward gain, S21, and large-signal gate and drain charges for a LDMOS transistor. The model is fast, taking less than 30 ms to extract a 50 point DC I DS-VDS characteristic and less than 5 ms to produce S-parameters at a single frequency. © 2011 IEEE.

This paper demonstrates a practical approach to developing a geometrically scalable thermal resistance model to optimize layout for improved electrical performance of highpower RF transistors. The model is developed using finite element-based simulations, which show very good agreement with measured results. The proposed modeling methodology precomputes simulations over all possible layout considerations and the individual elements of the thermal resistance matrices are automatically approximated by thin-plate splines. This approach produces a model for use within a circuit simulator with virtually no overhead. We are able to scale the model up to 60 mm with less than than 2% error in the maximum predicted temperature rise. © 2010 IEEE.

A scalable and accurate simulation technique to be used for the computer-aided design (CAD) of matching networks employed within high-power RF transistors is presented. A novel measurement methodology is developed and utilized during the validation of the proposed analysis approach. Appropriate segmentation techniques were developed, which are consistent with the design approach of the high-power transistor, that take into account the overall complexity of the internal match of most modern RF high-power transistors, while preserving important electromagnetic interactions. By being able to properly decouple the linear portion of the overall packaged transistor model, an objective accuracy assessment via the comparison of measured versus simulated results of the internal matching network was accomplished. The level of accuracy obtained provides credence to the idea of a full CAD-driven design process of the internal match of high-power RF transistors. © 2006 IEEE.

In this paper, we present a multi-physics approach for the simulation of high-power microwave transistors in which electromagnetic, thermal, and nonlinear transistor models are linked together within a harmonic-balance circuit simulator. This approach is used to analyze an LDMOS transistor operating at 2.14 GHz. The total gate width of the die is 102 mm, and the die is placed in a ceramic package and connected using bond-wire arrays at gate and drain. The effects of three different gate bond-pad metallization on the transistor efficiency are studied. Plots of the spatial distribution of the drain efficiency, and time-domain current and voltage provide a unique insight and understanding of the behaviours induced by the different bond-pads. © 2012 IEEE.

In this review we present a measurement-based approach to the creation of a successful circuit model of a high-power RF FET. We describe some of the measurement challenges that we face in the characterization and validation of the FET model, and our approach to their solution. We also outline some of the simulation and modeling techniques that are used in the construction of the complete transistor model. The model itself is fully nonlinear, with a self-consistent dynamic electrothermal component, and includes the in-package matching and package components, which are derived from electro-magnetic simulations. © 2008 IEEE.

© 2015 Wiley Periodicals, Inc. The modeling of the physical and electrical characteristics of microstrip non-uniform transmission lines (NTLs) utilizing artificial neural networks (ANNs) is investigated. The fundamental equations and constraints for designing variable impedance transmission lines are first presented. Then, a proof-of-concept example of a compact non-uniform matching transformer and the counterpart modeled version is elaborated for source and load impedances Zs and Zl, respectively, at 0.5 GHz. For comparison purposes, weights and biases of the proposed ANN are established with three different training techniques; namely: backpropagation (BP), Quasi-Newton (QN), and conjugate gradient (CG); at which the ABCD matrix, impedance variations, input port matching (S11), and transmission parameter (S21) are set as benchmarks to examine the validity of the trained model. The concept is then extended to model a NTL ultrawideband (UWB) Wilkinson power divider (WPD) with three resistors for improved isolation. S-parameters derived from the trained ANN outputs are close to those obtained by the traditional time-consuming optimization procedure, and show input and output ports matching and isolation of below -10 dB, and acceptable values of transmission parameters over the 3.1 GHz to 10.6 GHz band. The resulting models outperform traditional optimizations in terms of simulation time and reserved resources with comparable accuracy.

© 2015 Wiley Periodicals, Inc.The modeling of the physical and electrical characteristics of microstrip non-uniform transmission lines (NTLs) utilizing artificial neural networks (ANNs) is investigated. The fundamental equations and constraints for designing variable impedance transmission lines are first presented. Then, a proof-of-concept example of a compact non-uniform matching transformer and the counterpart modeled version is elaborated for source and load impedances Zs and Zl, respectively, at 0.5 GHz. For comparison purposes, weights and biases of the proposed ANN are established with three different training techniques; namely: backpropagation (BP), Quasi-Newton (QN), and conjugate gradient (CG); at which the ABCD matrix, impedance variations, input port matching (S11), and transmission parameter (S21) are set as benchmarks to examine the validity of the trained model. The concept is then extended to model a NTL ultrawideband (UWB) Wilkinson power divider (WPD) with three resistors for improved isolation. S-parameters derived from the trained ANN outputs are close to those obtained by the traditional time-consuming optimization procedure, and show input and output ports matching and isolation of below -10 dB, and acceptable values of transmission parameters over the 3.1 GHz to 10.6 GHz band. The resulting models outperform traditional optimizations in terms of simulation time and reserved resources with comparable accuracy.

A full-wave modeling procedure was developed to simulate the package, bonding wires, and MOS capacitors used in the design of matching networks found within RF/microwave power transistors. The complex packaging environment was segmented into its constituent components and simulation techniques were developed for each component, as well as the inter-element coupling. An S-parameter test fixture and package was developed that permits measurements of these types of devices. The simulation and measurement procedures were used to model various circuits. Measured S-parameters and those obtained using the full-wave methodology were in good agreement. Simulation results using an inductance-only bonding-wire model were performed and differences between the S-parameters were observed. A detailed examination of the loss introduced by the matching network was performed and simulations and measurements matched closely. © 2005 IEEE.

In this work, a new gradient based reverse modeling approach employing Artificial Neural Networks (ANNs) for systematic RF/microwave modeling is introduced. This approach is particularly suited to modeling scenarios, where standard ANN multi-layer perceptron (MLP) fails to deliver a satisfactory model. The proposed approach detects the simplest input-output relationship inherent to the modeling problem, which we term as the reverse model as compared to the original model (i.e., the modeling problem using standard ANN model). This reverse model is short-listed from a pool of candidate models obtained by systematically reversing the input-output variables of the original modeling problem, while retaining the ANN's structural simplicity. The proposed reverse and the not-so-Accurate original models complement each other to yield accurate models. The advantages of this approach are demonstrated via modeling transmission lines and spiral inductors. © 2012 European Microwave Assoc.

This paper demonstrates that by robust waveform engineering it is possible for high power Si LDMOS to achieve very high efficiency at frequencies up to 2.1GHz. Class F amplifier operation was realized in a 5W LDMOS device by the successful application of robust waveform engineering procedures; undertaken at the current generator plane. The peak power added efficiency was found to be 78% at 0.9GHz and 77% at 2.1GHz. In both cases the RF waveforms were optimized in terms of the gate voltage, fundamental and harmonic impedances. The main difference at 2.1GHz was the change in fundamental impedance to a more reactive impedance to compensate for the dynamic device output capacitance. To the authors' knowledge this is the highest efficiencies reported in the literature for Si LDMOS devices at 2.1GHz. © 2008 IEEE.

In this paper we investigate the effect of a discontinuity, at the measurement reference plane, on loadpull measurements of high-power RF transistors. The discontinuity is created by transition from the microstrip transformers on the printed-circuit board of the test-fixture to the packaged transistor. Our measurements indicate that the discontinuity does not change the peak performance of a packaged transistor but it can significantly alter the impedances at which this performance occurs. Through a straight-forward electromagnetic simulation we are able to characterize the discontinuity and remove it from measurement. © 2013 IEEE.

© Cambridge University Press 2007 and Cambridge University Press, 2009.This 2007 book is a comprehensive exposition of FET modeling, and is a must-have resource for seasoned professionals and new graduates in the RF and microwave power amplifier design and modeling community. In it, you will find descriptions of characterization and measurement techniques, analysis methods, and the simulator implementation, model verification and validation procedures that are needed to produce a transistor model that can be used with confidence by the circuit designer. Written by semiconductor industry professionals with many years' device modeling experience in LDMOS and III-V technologies, this was the first book to address the modeling requirements specific to high-power RF transistors. A technology-independent approach is described, addressing thermal effects, scaling issues, nonlinear modeling, and in-package matching networks. These are illustrated using the current market-leading high-power RF technology, LDMOS, as well as with III-V power devices.

A new quasi-two-dimensional physical model is described for microwave LDMOS power transistors. This nonlinear, process-oriented, model accounts for avalanche breakdown, hot carriers and process variations, and accurately predicts DC and microwave characteristics. The model has been applied to the optimization of LDMOS structures and shows good agreement over a wide range of structural variations. It is over three orders of magnitude faster than conventional two-dimensional physical models whilst maintaining a high level of accuracy, which makes it ideally suited to microwave CAD. © 2011 EUROPEAN MICROWAVE ASSOC.

In this paper we report a method of applying digitally modulated signals to an RF power transistor in a load-pull system. This methodology ensures that the transistor experiences realistic thermal conditions, as well as realistic electrical conditions during test. The measured data is then sliced at constant value of CCDF enabling meaningful performance comparisons to be made between devices and technologies. © 2006 EuMA.

An overview of neural network-based modeling techniques and their applications in microwave modeling and design is presented. The neural network represent RF/microwave components with the help of training data that are pairs of model input-output (IO) data generated from detailed microwave simulation or measurement. Neural networks have significant advantages over other techniques for multidimensional function approximation as they permit a compact representation of a multidimensional function, requiring minimal storage of coefficients and being very efficient to evaluate. The neural network can produce a parametric model by exploiting existing microwave knowledge in the form of empirical/analytical/equivalent model during neural network development. Neural network maps an existing model to match a new device with a technique called Neuro-Space Mapping (Neuro-SM).

In this paper, we present an envelope-domain behavioral model of a high-power RF amplifier. In this modeling approach, we use the signal envelope information, and the behavioral model is generated using an established nonlinear time-series approach to create a time-domain model that operates in the envelope or signal domain. We have generated a model of a 200-W Doherty amplifier from measured IQ data taken using a wideband code-division multiple-access excitation; the amplifier was driven from the linear regime into saturation. The time-series model was created using a time-delay embedding identified from auto-mutual information analysis, and an artificial neural network was used to fit the multivariate transfer function. The model has been validated using measured and simulated data, and it has been used in the development of a system-level design of a digital pre-distorter. © 2006 IEEE.

Vector network analysers (VNA) are used extensively for measurements that are made at frequencies ranging from a few kilohertz to at least one terahertz. At radio and microwave frequencies, there are well-established methods for assessing the quality and confidence of these measurements, when they are made in coaxial lines. These methods are usually based on determining the size of residual errors that remain in the VNA after calibration. To date, the performance of these methods has not been investigated in rectangular waveguide, and, at millimetre- and submillimetre-wave frequencies. This paper investigates the application of one of these techniques for waveguide measurements at microwave, millimetre- and submillimetre-wave frequencies. Typical values of residual errors obtained over these frequency ranges are given. These values are considered representative and so can be used by other users of waveguide VNAs to compare with values obtained on their own systems, therefore helping to verify the performance of their systems.

We propose a compact wideband multi-way power divider/combiner with planar structure for applications to RF power amplifiers (PAs). Uniform transmission lines in the conventional divider are replaced with non-uniform transmission lines (NTLs), which are governed by a truncated Fourier series. An optimization-driven framework is employed in even-mode analysis to obtain the coefficients of the NTLs considering predefined operating bands, whereas three isolation resistors are optimized in the odd-mode analysis to achieve optimal isolation and output port matching over the design bandwidth. For verification purposes, a 4?10 GHz 3-way divider is simulated, and measured. Simulations and measurements are in close proximity and show input/output ports matching of better than ?10 dB and transmission of ?4.9 ±1 dB across the design bandwidth.

This paper will describe the design, fabrication and testing of an on-wafer substrate that has been developed specifically for measuring extreme impedance devices using an on-wafer probe station. Such devices include Carbon Nano-Tubes (CNTs) and structures based on graphene which possess impedances in the k© range and are generally realised on the nano-scale rather than the micro-scale that is used for conventional on-wafer measurement. These impedances are far removed from the conventional 50 © reference impedance of the test equipment. The on-wafer substrate includes methods for transforming from the micro-scale to the nano-scale and reference standards to enable calibrations for extreme impedance devices. The paper includes typical results obtained from the designed wafer.

The use of substrate integrated waveguides (SIW) for microwave and millimeter wave integrated components has increased dramatically over the last decade. They mimic the performance of conventional metallic waveguides and they are fabricated using printed circuit boards using the top and bottom metallisation with two rows of vias forming the side walls. This creates a low profile, compact, and light weight alternative to conventional metallic waveguides, and they allow a direct interconnection with printed circuit boards and active components. This paper reviews the fundamental theory, documents the research that has been performed over the past decade, and summarises progress up to the recent state-of-the-art including novel SIW structures for passive circuits and antennas as well as new applications for reconfigurable and printed circuits using SIW technology.

Nano-scale devices and high power transistors present extreme impedances, which are far removed from the 50-© reference impedance of conventional test equipment, resulting in a reduction in the measurement sensitivity as compared with impedances close to the reference impedance. This letter describes a novel method based on active interferometry to increase the measurement sensitivity of a VNA for measuring such extreme impedances, using only a single coupler. The theory of the method is explained with supporting simulation. An interferometry-based method is demonstrated for the first time with on-wafer measurements, resulting in an improved measurement sensitivity for extreme impedance device characterization of up to 9%.

In this paper, we propose a robust microwave characterization of inkjet printed components on flexible substrates, which aim at measuring the material properties of silver nanoparticle inks and the supporting dielectric spacer employed during measurements. Starting with propagation constant extracted from multiline thru-reflect-line calibration with coplanar waveguide (CPW) standards and then proceeding with finite element modeling of CPWs, the proposed technique can dynamically produce an interpolated search space by automatic driving of simulation tools. In the final stage, the algorithm utilizes a least-square optimization routine to minimize the deviation between model and measurements. Our technique significantly reduces the computing resources and is able to extract the material parameters using even a nominal ink profile. Characteristic impedances for CPWs are extracted using series resistor measurements from 10 MHz to 20 GHz. It is also shown that the proposed characterization methodology is able to detect any changes in material properties induced by changes in fabrication parameters such as sintering temperature. Ink conductivities of approximately 2.973×10^7 S/m and spacer dielectric constant of 1.78 were obtained for the inkjet printed CPWs on PET. In addition, the inkjet printed CPWs sintered at 170°C and 220°C on Kapton had conductivities of 0.187×10^7 and 0.201×10^7 S/m respectively. We verified our technique by measuring the material parameters with conventional approach.

We develop a novel method for the behavioural modelling of adaptive array systems (AASs) incorporating high- power amplifier (HPA) nonlinearities. The model is motivated by the need to better define the spatial and spectral interference profile of AASs. We provide a simulated proof of concept as a precursor to experimental validation. In our demonstration, the model is identified using simulated near-field measurements made while the antenna?s input channels are simultaneously undergoing a representative excitation. These measurements are used to identify a large number of memory polynomials (MPs) which characterise the transfer function from the antenna inputs to the near-field. We then use the array of MPs and a near-field to far- field transformation to obtain the far-field pattern of the antenna for arbitrary input. We show the impact of antenna element HPA nonlinearities on the far-field pattern, and our ability to predict them via the developed model.

The ever-increasing power density of semiconductors used in monolithic microwave integrated circuits (MMICs) and power amplifiers (PAs) mandates good thermal management and accurate temperature measurements are needed to study device reliability, assess temperature gradients, and to validate nonlinear electrothermal model performance. Thermoreflectance based temperature measurements have been recently applied to high-power microwave semiconductors. The technique determines the temperature by measuring the change in reflectance from a surface due to changing in the index of refraction of the sample. Since the measurement technique uses visible light, thermoreflectance imaging can achieve a spatial resolution of 290 nm and sub-nanosecond temporal resolution over a wide field of view. This makes the method well suited to study the thermal dynamics within these transistors. This presentation will review the capabilities of thermoreflectance measurement, explain the theory behind the thermoreflectance phenomenon, and demonstrate the usefulness of the method and the insights that can be gained by examining several recent measurements.

This paper presents the modelling of a coplanarwaveguide bottom-gated FET switch using indium-arsenide nanowires. The nanowires have been included on the switch using dielectrophoresis, which is a solution processable technique. This is a necessary first step towards developing a fully printable switch on a flexible substrate, for low cost microwave devices, built using additive manufacturing methods. The measured S-parameters show the switching capabilities of the device with an insertion loss of 9 dB, when the switch is open (gate voltage e 60 V). The development of a distributed circuit model that matches the measured data is described, alongside the calculated network parameters used to represent the coplanar-waveguide and the nanowires. The model fits the measured results within 8%, making it suitable for inclusion in a CAD based circuit simulator.

In this paper, we propose a non-quasi-static large-signal model to capture the high-frequency dispersion exhibited by laterally diffused metal-oxide semiconductor (LDMOS) devices. We show that industry-standard nonlinear large-signal models for LDMOS based on quasi-static assumptions are not sufficient for high-efficiency designs at frequencies higher than 2 GHz. This dispersive behavior results from the combination of high-frequency operation and the lengthened drain extension region that is needed to support high-voltage operation. To improve the model accuracy, higher-order current and charge components, which are directly integrated from bias-dependent S-parameter data, are included in the model. The non-quasi-static large-signal model improves the efficiency and gain predictions by 10% and 0.5 dB at 3.5 GHz. These improvements in accuracy are essential for power amplifier designers to achieve the performance targets necessary for 4G and upcoming 5G designs.

This project was dedicated to the development of solution-processed nanomaterials-based high-performance field-effect transistors (FETs) suitable for a new application area of printed reconfigurable antennas. The focus of research was on implementing solution processed high electron mobility InAs nanowires (NWs) as semiconducting channel in field effect transistors. The key direction of this work was the development of InAs NWs FETs with a designated high frequency waveguide geometry to enable they operation as microwave switch elements. Initially, InAs NW FETs were developed and tested in direct ? current mode to allow evaluation and extraction of key transistor performance parameters such charge carrier mobility, threshold, on/off ratio, transconductance, subthreshold swing, and on-channel resistance. The InAs NW were assembled from nanowire ?inks? in the FETs channel via electric -field assisted assembly technique, dielectrophoresis. Nanowires were directly incorporated in FETs with bottom-gate architecture on Si/SiO2 substrates, and with top-gate architecture on quartz substrates with polymeric gate dielectrics. Current-voltage characteristics were measured both in controlled dry nitrogen atmosphere and ambient environment, and demonstrated an instability of unprotected InAs NW in ambient air. Protection of nanowire channel with Al2O3 layers has resulted in significant improvement of device stability. Optimised InAs NW FET devices demonstrated electron mobility over 1000 cm2/Vs and on-off current ratios up to 1000. Finally, a proof of principle for solution processed InAs NW field-effect transistors operating as microwave switches in 5-33GHz frequency range have been demonstrated. FET devices were implemented in co-planar waveguide (CPW) microwave transmission line geometry, providing efficient transmission or reflection of microwave signal. The FETs demonstrated high performance with transistor ON-state resistance as small as H50 © providing an excellent impedance match to that of microwave waveguide. Bringing FETs to the OFF state provided 1000 times resistance increase, resulting in FET microwave switch behaviour, characterised by ~10 dB change in scattering (S)-parameters, such as difference in transmission coefficient S21 between on/off switching states.

In this paper, through-plastic vector E-field measurements of an LDMOS transistor in an over-molded plastic package are presented. The measurement system uses a commercially-available electro-optic system connected to an NVNA with a comb generator to non-invasively measure the phase-coherent multi-harmonic E-fields. The device is measured in a load-pull measurement system, which is used to present optimal source and load impedances to the transistor during the multi-harmonic E-field measurements. All three E-field components are measured at the fundamental (2.2 GHz) and two harmonics at P1dB = 53.2 dBm.

The Joint Committee for Guides in Metrology (JCGM) publishes and maintains reference documents relating to general aspects in metrology. Working Group 1 of the JCGM is responsible for the Evaluation of Measurement Data series of documents that gives information for evaluating and expressing uncertainty in measurement. This paper compares several methods for evaluating measurement uncertainty that are described in these documents. Emphasis is given to situations where more than one input quantity is measured simultaneously. This leads to an investigation into how these methods perform when these quantities are high-frequency electromagnetic scattering parameters. It is shown that for measurements involving a large number of input quantities, such as those involving microwave scattering parameters, the required number of observations for the approach given in the GUM Supplements to work can be prohibitively large.

For the first time, this paper presents and validates a novel extension of the X-parameter behavioral modeling paradigm to include dynamic electro-thermal phenomena, a key source of long-term memory affecting transistors. The dynamic thermal X-parameter model (DTXM) adds a novel but straightforward method to implement envelope domain sub-circuit in a feedback loop around a conventional static X-parameter model, enabling the simulation of modulated waveform-dependent dynamic self-heating effects. The extended model is identified from conventional CW or pulsed X-parameter measurements, over a range of ambient temperatures. A re-referencing of the extracted X-parameter data to the junction temperature is performed, based on estimated or a calculated thermal resistance and thermal capacitance. The model can also be generated in the simulation environment starting from a dynamic electro-thermal compact time-domain model. The DTXM accounts for thermallyinduced asymmetry of intermodulation distortion products and temperature hysteresis depending on the signal bandwidth.

In this paper, a new combined electro-optic and pulsed nonlinear vector network analyser-based load-pull measurement system for distributed multi-harmonic electric field measurements is presented. The system uses an external electrooptic probe to measure cross-frequency phase-coherent multiharmonic vector E-fields with an 8 µm spatial resolution and 20 MHz ? 20 GHz bandwidth. We demonstrate the performance of the distributed phase-coherent E-field measurements of Ex, Ey and Ez components with 3 harmonics above a commercially available large periphery, packaged, laterally diffused metaloxide-semiconductor (LDMOS) transistor. The transistor was measured at 2.2 GHz under pulsed conditions with 10 µs pulse and 10 % duty cycle, while outputting 55.1 dBm of power. The measured electric fields of the operating transistor are animated for the first time and reveal complex non-uniform operation at harmonic frequencies

We present for the first time a measurement system that is capable of directly detecting and identifying the physical location of an oscillation within RF and microwave power amplifiers. The method uses a combined external electrooptic, non-linear vector network analyzer, and vector load-pull measurement system, which allows the measurement of crossfrequency phase-coherent multi-harmonic vector electric fields above the transistor with an 8 ¼m spatial resolution and 20 MHz ? 40 GHz bandwidth. Raster scans above the amplifier allow the time-domain electric fields to be animated and superimposed on top of the amplifier image enabling immediate identification of any oscillations by direct inspection. The method is first demonstrated on a low power amplifier composed of two parallel 0.1-W pHEMT transistors that is intentionally designed to have an odd-mode oscillation. The applicability of the method is further demonstrated by measuring and animating in-package parametric odd-mode oscillations within a 260-W laterally diffused metal-oxide-semiconductor (LDMOS) transistor operating at 2.2 GHz under pulsed RF conditions with 10 ¼s pulses and 10% duty cycle. The measurement and identification technique is applicable to all semiconductor devices as the external electric field is non-invasively measured above the amplifier.

We propagate for the first time correlated measurement uncertainties into a nonlinear behavioral model of a millimeter-wave amplifier. We make use of the National Institute of Standards and Technology Microwave Uncertainty Framework to evaluate the uncertainties in large-signal electromagnetic wave measurements of an amplifier, followed by the extraction of Xparameters using an industry standard algorithm. This extracted model is included as a component in a circuit simulator to evaluate gain and efficiency incorporating measurement uncertainty.

The feasibility of using self?assembled InAs nanowire bottom?gated field?effect transistors as radio?frequency and microwave switches by direct integration into a transmission line is demonstrated. This proof of concept is demonstrated as a coplanar waveguide (CPW) microwave transmission line, where the nanowires function as a tunable impedance in the CPW through gate biasing. The key to this switching capability is the high?performance, low impedance InAs nanowire transistor behavior with field?effect mobility of H300 cm2 V?1 s?1, on/off ratio of 103, and resistance modulation from only 50 © in the full accumulation mode, to H50 k© when the nanowires are depleted of charge carriers. The gate biasing of the nanowires within the CPW results in a switching behavior, exhibited by a H10 dB change in the transmission coefficient, S21, between the on/off switching states, over 5?33 GHz. This frequency range covers both the microwave and millimeter?wave bands dedicated to Internet of things and 5G applications. Demonstration of these switches creates opportunities for a new class of devices for microwave applications based on solution?processed semiconducting nanowires.

The complexity of RF front-end (RFFE) modules of wireless devices has increased dramatically over the past decade. In order to meet the demands for future mobile communications, RFFEs will need to enable multiband for global roaming, and multi-mode to support multiple cellular modes, incorporate beamforming antennas, and operate at mmwave frequencies. To this end, this paper presents a summary of the recent progress in RF substrate technologies, waveguide architectures and multi-band design techniques for 5G RFFE modules, and summarizes the present and future challenges in RFFE module design.

Nanoscale devices have an intrinsic impedance significantly different than the 50-© reference impedance of the measurement systems. This results in a high reflection coefficient, limiting the accuracy of the measurements leading in imprecise characterisation. In addition, the small dimensions of nanoscale devices forbid their physical access using conventional microwave probes. It is therefore essential to investigate new measurement techniques and to develop access structures, for nanoscale high-frequency characterisation. This thesis presents the fabrication of new access structures and calibration standards based on a co-planar waveguide design, for the microwave measurement of nanoscale devices. The calibration structures are used for the first time to move the measurement reference plane to a nanoscale device using a calibration algorithm. Furthermore, to mitigate for the impedance mismatch between the devices and the measurement systems, a new measurement technique based on active interferometry was developed. The method is based on a simplified measurement configuration and a custom calibration that mitigates for the finite directivity of the couplers used for the implementation of the technique, achieving a significantly higher measurement sensitivity for extreme impedances compared to conventional techniques. To showcase the potential usage of nanoscale devices within a microwave application, a prototype coplanar-waveguide switch has been developed that incorporates indium arsenide nanowires. The prototype device has shown encouraging high-frequency switching capabilities and an equivalent circuit model was developed that matches the high-frequency S-parameters of the device within an 8% error. Lastly, the electromagnetic coupling between calibration standards within an on-wafer environment has been successfully measured and investigated using an electro-optic on-wafer measurement system. The coupling can affect the accuracy of a calibration performed, and can have critical ramifications to the accurate characterisation of nanoscale devices.

Fifth generation communication networks promise extremely high data throughputs, low latencies, and ultra-high reliability by employing small cells in high density networks. This will increase the use of highly ine?cient microwave power ampli?ers, that exhibit e?ciencies sometimes as low as 10% for advanced multi-carrier waveforms. To overcome these ine?ciencies and enable next generation technology development, the internal distributed behaviour of the packaged microwave power transistor has to be fully characterised, which is impossible using conventional port-based measurements. In this dissertation, the development of a set of multiphysics measurement techniques that capture the distributed electrical, electromagnetic, and thermal device behaviour is described. These new multiphysics measurement techniques enable the characterisation and direct visualisation of the ine?cient device performance, providing a basis for future design optimisation. The techniques combine a non-linear vector network analyser, electro-optic, load-pull and thermore?ectance measurement systems that enable large signal time-domain electrical, distributed multi-harmonic vector electric ?eld (E-?eld), and transient and steady-state thermal measurements. The multiphysics measurement set-up was used to characterise various transistors and PAs including 260 W silicon (Si) laterally di?used metal oxide semiconductor (LDMOS) ?eld e?ect transistors in both air-cavity ceramic and plastic packages, 25 W gallium nitride (GaN) on silicon carbide high electron mobility transistors (HEMTs), 250 W GaN HEMT and 360 W Si LDMOS Doherty power ampli?ers. The E-?eld measurements enabled the ?rst ever imaging of parametric odd-mode oscillations within multi-die packaged high-power microwave transistors. Additionally, the measurement system was used to verify the e?ectiveness of in-package oscillation suppression circuits. As high-resolution E-?eld measurements can be slow, a surrogate modelling-based measurement algorithm was implemented to accelerate measurements 10-fold. Transient thermal measurements helped to identify abnormal transistor ?nger-to-?nger heating in GaN HEMTs and revealed thermal di?erences along the gate width in GaN-based asymmetric transistors for Doherty power ampli?er applications.

To support the responsible implementation of next-generation wireless communications networks such as 5G, the efficiency of power amplifiers located in both base-stations and mobile handsets must be improved. This improvement will also benefit other areas of wireless innovation such as satellite communications, military and civilian short-range radar (automotive and gesture tracking), and future submillimetre-wave communications. Significant efficiency gains can be obtained by using nonlinear amplifier techniques, however these cause undesired distortion to the signal. Methods used to mitigate these effects rely on accurate models extracted from the internal transistors, which circuit simulators interrogate to predict the performance of new amplifier designs. This thesis presents the first evaluation of measurement uncertainty propagated into a nonlinear behavioural model, X-parameters, and used within a circuit simulator to provide confidence in the results. This uncertainty evaluation can also reveal the relative uncertainty contributions from different aspects of the measurement setup, the knowledge of which can be used to make informed improvements in manufacturing test laboratories. The evaluation was tested on a millimetre-wave amplifier designed for communications use, which showed encouraging results when simulated in a test circuit to provide figures for gain and PAE. During development of this uncertainty evaluation, a standard guidance document was reviewed and found to contain ambiguities which significantly affect scattering-parameter measurements commonly used in RF laboratories. This ambiguity is highlighted to inform those working on revisions that is must be addressed. Finally, traditional uncertainty evaluation techniques for vector network analyser measurements in coaxial transmission lines are applied to rectangular metallic waveguide setups to investigate their success. Waveguide concerning frequencies up to 750 GHz are considered, covering E-band and higher which are being developed for future high-bandwidth communications. Although the uncertainty evaluation techniques work well for most waveguides tested, mechanical issues in WR-1.5 prohibits the feasibility of the technique.

Solotronic devices formed from group V dopants in silicon are a prospective option as a qubit system for quantum technologies. A spin-based silicon based quantum computer is highly promising with the longest qubit coherence times found to date, and an existing compatibility with the CMOS industry. The electron spin states of silicon solotronic devices are controlled through resonance absorption of microwave frequencies. Due to the small dimensions of the dopants, integration of the microwaves to ensure individual qubit addressability is a important step on the path to producing a commercial quantum computer. Within this thesis, we investigate two different pathways to potentially optimise this process. Mesoscopic interconnects could be used to deliver microwaves to individual qubits within a qubit array. Conventional metals are not suitable as the resistivity increases as the dimensions approach the atomic scale and have immature nanoscale fabrication techniques. Highly doped metallic phosphorous delta-doped monolayers in silicon could be a viable material for mesoscopic transmission lines. Si:P delta-doped nanowires can be fabricated with atomic precision and have been shown to maintain ohmic behaviour down to wire widths of 1.5nm. The microwave characterisation of Si:P delta-doped layers was completed validating that it is a suitable material for microwave propagation. The transmission parameters are extracted and matched to a circuit model and complementary electromagnetic simulations. A universal nanoscale transmission model showed that Si:P nanowires have transmission parameters equivalent to graphene nanoribbons and have optimal behaviour compared to copper nanowires below 5nm. This investigation has further reaching applications than silicon quantum technologies as conventional microelectronics also require mesoscopic interconnects as Moore's law progresses. The application of an external magnetic field modulates the electron spin splitting within a group V donor and has a linear relationship with the resonant microwave frequency under high magnetic fields. Within the literature, external magnetic fields approaching 10T are being used to optimise the operating conditions of the qubit and to simplify the experimental parameters. Knowledge of the behaviour and mechanisms of the spin lattice relaxation is unknown at these fields. Electron spin resonance in phosphorous doped silicon was demonstrated at magnetic fields between 10-14T using electrically detected donor bound exciton spectroscopy. To accompany this investigation, the first donor bound exciton spectroscopy model under the influence of magnetic field was developed and analysed.