
George Ntavazlis Katsaros
About
My research project
Massively Parallel Non-Linear Processing Architectures for 6G CommunicationsArchitectural and algorithmic design of massively parallel, real-time and power-efficient MIMO PHY, with particular application to future wireless and Open RAN communication systems.
Supervisors
Architectural and algorithmic design of massively parallel, real-time and power-efficient MIMO PHY, with particular application to future wireless and Open RAN communication systems.
Publications
The general tendency to deliver Open Radio Access Network (Open-RAN) solutions by means of software-based, or even cloud-native, realizations drives the development community to fully capitalize on software architectures, even for the computationally demanding 5G physical layer (PHY) processing. However, software solutions are typically orders of magnitude less efficient than dedicated hardware in terms of power consumption and processing speed. Consequently, realizing highly-efficient, massive multiple-input multiple-output (mMIMO) solutions in software, while exploiting the wide 5G transmission bandwidths, becomes extremely challenging and requires the massive parallelization of the PHY processing tasks. In this work, for the first time, we show that massively parallel software solutions are capable of meeting the processing requirements of 5G New Radio (NR), still, with a significant increase in the corresponding power consumption. In this context, we quantify this power consumption overhead, both in terms of Watts and carbon emissions, as a function of the concurrently transmitted information streams, of the base-station antennas, and of the utilized bandwidth. We show that the computational power consumption of such PHY processing is no longer negligible and that, for mMIMO solutions supporting a large number of information streams, it can become comparable to the power consumption of the Radio Frequency (RF) chains. Finally, we discuss how a shift towards non-linear PHY processing can significantly boost energy efficiency, and we further highlight the importance of energy-aware digital signal processing design in future PHY processing architectures.